The excimer method, which may be implemented by means of a device illustrated in FIG. 1A, enables to structure and to pattern patterns obtained by the projection of a mask (1). The ablation of the substrate (2) is achieved by the interaction between the UV beam (3, excimer) crossing the mask (1) made of glass and aluminum and the layer surface (substrate, 2).
The excimer laser is a gas laser which emits in pulsed mode in the ultraviolet range, between 193 and 351 nanometers according to the gas mixture used. The gas mixture is formed of a rare gas G (Ar, Xe, Kr) and of a halogenated compound X (F2, HCl). The excitation, be it electric or by electron beams, results in the forming of excited molecules GX* [ArF (λ=193 nm), KrF (λ=248 nm), XeCl (λ=308 nm), XeF (λ=351 nm)]. The delivered energies are on the order of one joule and the pulse durations vary from 10 to 150 nanoseconds, while the frequencies can reach one kHz. High-power excimer sources have appeared in 1992 (Paverage: from 500 to 1,000 W) opening the way to their use for surface processing.
Excimer laser has specific advantages: a high photon energy (several eV) enabling to achieve photochemical effects, processings with a submicronic spatial resolution, and very limited thermal effects, a laser-to-matter coupling which is more efficient in ultraviolet than in infrared. Above 300 nm, a transport by optic fiber appears to be possible.
During the ablation, a molten bead or a cap-like metal projection (FIG. 1B) is present on the etch edges, according to the power used: a low power provides cap-like projections while a high power provides molten edges which generally have delaminated or molten dimensions greater than one micrometer. Such profiles are a great issue for the use of these patterns in the forming of organic electronic components, for which techniques of deposition of active layers having a thickness on the order of 100 nanometers are used. Depositing thin layers of 100 nanometers or less, for example semiconductors from 30 to 70 nanometers on patterns exhibiting such projections and profiles raises many issues.
This may especially cause electric leakages, step crossing difficulties, dimension losses (for example, concerning the channel width), a premature aging . . . .
Now, it has been observed that whatever the metal used (Ti, Cu, Au, Ni, Pt, . . . ), the technique of laser ablation by mask projection never leaves a perfect pattern edge. This is inherent to the method and can be explained by the fact that the heat of UVs during the “laser shooting” makes the metallization burst.
This disadvantage is a major concern in microelectronics, and especially in the forming of transistors.
Microelectronics has conventionally developed around inorganic materials such as silicon (Si) or gallium arsenide (GaAs). Another path is now explored around organic materials, such as polymers, due to the ease of their large-scale manufacturing, to their mechanical resistance, to their flexible structure, or again to the easy reprocessing. Displays based on organic diodes (OLEDs) or based on organic thin-film transistors (OTFTs) have thus been designed. Further, the use of layer deposition techniques, for example, by spin coating, inkjet, or silk-screening, is made possible by the use of soluble polymers.
However, the stacking of different organic and/or inorganic layers raises a number of issues. In particular, the design of a transistor requires two conductive levels:
In high-gate architecture (FIG. 2A), conductive level 1 (4) is deposited on the substrate (5) after which the source and drain electrodes (6, 7) are etched by different types of methods such as an excimer-type laser ablation. This step requires a very fine adjustment of the laser beam power, to decrease cap-like projections to a minimum.
In low-gate architecture (FIG. 3A), conductive level 2 (4) is deposited on the gate dielectric (9) after which the source and drain electrodes (6, 7) are etched by laser ablation. Similarly, this step requires a very fine adjustment of the laser beam power to decrease cap-like projections and the degradation of the gate dielectric to a minimum.
There thus is an obvious need to develop technical solutions enabling to minimize such effects at the edges of the etch pattern.